The present invention relates to a method of manufacturing a semiconductor device, a photomask, and a master mask. More particularly, the invention relates to a method of transferring the pattern of a master mask to a substrate or a photomask by means of a projection-type exposure apparatus.
FIG. 1 shows the sequence of manufacturing a conventional logic device. More precisely, FIG. 1 shows the sequence of designing and manufacturing a system LSI. At first, the design specification is prepared in Step 111 in accordance with requests made by the customer. In Step 112, a Register Transfer Level (RTL), which is a kind of a Hardware Description Language (HDL), is prepared on the basis of the design specification. In Steps 113 and 114, the RTL is converted to a circuit diagram by using a logic synthesis tool. In Steps 115 and 116, a Placement and Routing (PandR) tool is used, thereby preparing a layout diagram.
The layout of function blocks, known as standard cells, macro cells, and IP blocks, is designed for the layers located below the wiring layer. Then, the data representing this layout is generated in the form of an information library. In accordance with the information library, the cells corresponding to the function blocks of circuit diagrams are automatically arranged by the placement and routing function of the PandR tool. In the wiring layer, cells are arranged to work in compliance with cells arranged in lower layers. These cells are automatically prepared by using the placement and routing function in accordance with the circuit diagrams.
A one-chip LSI layout diagram is thus prepared. In Step 117, the LSI layout diagram is subjected to Process Proximity Correction (PPC), which is performed by using data conversion software, and is then converted to mask-writing data.
The components of the pattern may be made smaller, approaching the minimum size equivalent to the resolution of the exposure apparatus used. If so, each pattern component on the wafer will have its corners rounded during photolithography due to the optical proximity effect (OPE). Consequently, the pattern formed may not correlate to the desired pattern. For example, the end portions of each pattern component may become shorter than is designed. To make matters worse, the widths of pattern components may change in some cases due to micro-loading effect, after the mask layer or the wafer has been etched. The optical proximity effect and the micro-loading effect are generally called xe2x80x9cPPE (Process Proximity Effect).xe2x80x9d The technique of correcting the deformation of a pattern, caused by PPE, is known as xe2x80x9cPPC.xe2x80x9d
In Step 118, a mask-writing tool draws a pattern on a substrate in accordance with the mask-writing data, thereby manufacturing a master mask. In Step 119, an exposure apparatus applies light to a wafer through the master mask. An LSI pattern is thereby formed on the wafer in Step 120.
As the integration density of an LSI pattern increases, the components of device patterns must have smaller sizes of higher precision. It is therefore necessary to form a larger master mask for each device pattern. Therefore, one master mask cannot alone represent the entire one-chip LSI pattern. That is, two or more master masks must be formed to represent a one-chip LSI pattern. FIG. 2 is a flow chart explaining a conventional method of manufacturing a semiconductor device, in which a plurality of master masks are used to form a one-chip LSI pattern. As shown in FIG. 2, the actual layout diagram of an LSI is prepared in Step 206. In Step 207, the layout diagram of the LSI pattern is converted to data, and the resultant data is divided into parts by the use of a chip-data cutting tool. The parts of the data thus provided will be used to prepare master masks that form a one-chip LSI pattern. The flow chart of FIG. 2, explaining the method of manufacturing an LSI, is basically the same as the flow chart of FIG. 1 but different in that the data representing the layout of the LSI is divided into, for example, two parts by using a chip-data cutting tool. FIGS. 3A and 3B are diagrams for explaining, in detail, a conventional method of manufacturing a semiconductor device.
Two master masks 131 and 132 are prepared on the basis of two pattern data items, respectively. Light is applied to a wafer 4 through first master mask 131. Shaded regions 133 of wafer 4 are thereby exposed to light as is illustrated in FIG. 3A. Next, light is applied to wafer 4 through the second master mask 132, whereby shaded regions 134 of wafer 4 are exposed to light as is shown in FIG. 3B. A product 1 is thereby made. Since the chip has been divided along a center line into two parts, the cell B is divided into two parts Bxe2x80x2 and Bxe2x80x3, and the cell D into two parts Dxe2x80x2 and Dxe2x80x3, as is illustrated in FIGS. 3A and 3B. Inevitably, the pattern in the cell B is cut into two parts, and the pattern in the cell D into two parts. Four butting portions of the pattern are therefore formed on the wafer 4. As shown in FIG. 3B, pattern components 135 (e.g., resist strips) on one part may not align with pattern components 125 (e.g., resist strips) of the other part at butting portion 136, as is illustrated in FIG. 3B. When each pattern component on one part is combined with the corresponding one on the other part, the resultant single pattern component has a size different from the designed one, inevitably deteriorating the precision of the resist pattern.
The problem with the butting portions of the pattern is prominent if an LSI pattern is formed by means of a mask-forming exposure apparatus (known as xe2x80x9cphotorepeaterxe2x80x9d). The mask-forming exposure apparatus projects a reduced image of a master mask on a mask layer. As shown in FIG. 4, the exposure apparatus comprises a projection optical system 142. Shown in FIG. 4 are a master mask 141 and a photomask 143. The projection optical system 142 is a ⅕-reduction system that has a 22xc3x9722 mm field at the photomask dimension. The reduction ratio of the system is set to xc2xc to form a pattern on a wafer. Therefore, two or more master masks must be jointed together and light must be applied to the wafer through the master masks in order to form chips having a size of 5.5xc3x975.5 mm or more on the wafer.
A method of manufacturing an LSI pattern, in which master masks are jointed together to expose a wafer to light through them, will be explained with reference to the flow chart of FIG. 5. This method differs from the method shown in the flow chart of FIG. 1 in that a photorepeater is used to form a photomask. The chip-cutting tool used in this method performs the same function as the tool used in the process shown in FIG. 3A. How the photomask is formed in this method will be described with reference to FIGS. 6A to 6D. Assume that the data representing the layout of a product named xe2x80x9cproductxe2x80x9d 11 is divided into four data items. Using the four data items, four master masks 151 to 154 are prepared. Light is applied to a photoresist layer, first through the first master mask 151, then through the second master mask 152, next through the third master mask 154, and finally through the fourth master mask 154. As a result, a photomask 155 is formed. In this case, the chip is divided into four parts, along the vertical center line and the horizontal center line. Therefore, cell B is divided into two parts Bxe2x80x2 and Bxe2x80x3, and cell D into two parts Dxe2x80x2 and Dxe2x80x3. Inevitably, the pattern in the cell B is cut into two parts, and the pattern in the cell D into two parts. Butting portions of the pattern are therefore formed on the wafer. As shown in FIG. 6D, resist strips 156 forming one part of the pattern may not align with resist strips 156 forming the other part of the pattern, at butting portion 157, as is illustrated in FIG. 6D. When each resist strip on one part is combined with the corresponding one on the other part, the resultant single resist strip has but a size different from the designed one, inevitably deteriorating the precision of the resist pattern.
In the conventional method of manufacturing a semiconductor device or a photomask, the data representing the layout pattern of the product is divided into data items, no matter whether the patterns of the master masks are transferred by a projection-type exposure apparatus or a photorepeater. Since the data is so divided, without reference to the data showing the arrangement of standard cells, macro cells, IP blocks and the like, the pattern in a cell may be divided into parts in some cases. Consequently, the pattern components formed, on the cell parts are not aligned and each combined pattern component fails to have the desired design size at the butting portions.
The present invention provides a method of manufacturing a semiconductor device, in which each pattern component is prevented from having a size different from the design size at the butting portions between its parts.
The invention provides a method of manufacturing a photomask, in which each pattern component is prevented from having a size different from the design size at the butting portions between its parts.
The invention provides a master mask in which each pattern component is prevented from having a size different from the design size at the butting portions between its parts.
The invention provides a method of manufacturing a semiconductor device comprising selecting at least one of function-unit patterns made in a master mask and arranged on the basis of layout data representing a layout diagram of the semiconductor device, and applying light through the selected function-unit pattern to a substrate, thereby transferring the selected function-unit pattern to the substrate and forming the selected function-unit pattern thereon at a prescribed position by means of photolithography.
The invention provides a method of manufacturing a photomask, comprising selecting at least one of function-unit patterns made in a master mask and arranged on the basis of layout data representing a layout diagram of the semiconductor device, and applying light through the selected function-unit pattern to a photomask layer, thereby transferring the selected function-unit pattern to the photomask layer and forming the selected function-unit pattern thereon at a prescribed position by means of photolithography.
The present invention provides a master mask designed to transfer a pattern and having function-unit patterns arranged on the basis of layout data representing a layout diagram of the semiconductor device.
Before transferring the function-unit pattern to a wafer by a projection-type exposure apparatus or to a photomask by a photorepeater, the pattern of the semiconductor device is divided into masks along the boundaries of the function blocks, on the basis of layout data representing a layout diagram of the semiconductor device. A plurality of master masks are thereby prepared and used, transferring function-unit patterns to the wafer or photomask. Therefore, each function-unit pattern is not divided at all, and the components of any function-unit pattern are not cut into parts. Thus, the pattern components do not change in size as does a pattern component composed of two or more parts jointed together.
The master mask has various function-unit patterns formed and arranged in accordance with the layout data that represents the layout diagram of the semiconductor device. Some of the function-unit patterns are selected. Light is applied through the selected patterns to a wafer or photomask layer. Hence, different products, each different in the actual layout from any other, can be manufactured by using only one master mask. Many master masks need not be prepared or used. This greatly reduces the manufacturing cost of preparing the master mask. The time required to prepare the master mask is saved, greatly shortening the time of manufacturing the LSIs.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.